Integrated circuits, such as system-on-chip (SoC) designs or other very-large-scale-integration (VLSI) systems, comprise a number of circuit elements or components that receive supply voltage from one or more on-die power grids or power distribution networks (PDNs). Although the PDN is designed to supply a nominal operating voltage to the integrated circuit components, a number of operating factors can cause the voltage supplied by the PDN to temporarily drop below this nominal operating voltage, a condition referred to as voltage droop. Supply voltage droop may result when the integrated circuit experiences a sudden increase in switching activity, resulting in transient surges in current draw that may produce a droop in the supply voltage.
The above-described description is merely intended to provide a contextual overview of current techniques and is not intended to be exhaustive.